45.简易DDS信号发生器的设计与验证（4）

（1）为了方便，不如把VIO ip核搬移到顶层模块，修改核心模块，将它的频率控制字作为输入引出。

（2）顶层模块代码：

module dds_top
(
    input               clk         ,
    input               reset_n     ,
    input   [3:0]       key         ,
    
    output  [7:0]       data_out    ,
    output              dac_clk     
    
);

    assign  dac_clk = ~clk;
      
/*
    Fout = ford * Fclk /  2 ^ 32;
    则 ford = Fout * 2^32 / Fclk;
    Fclk = 50_000_000;
    ford = Fout * 85.89934592
    如果想要输出一个1MHz的正弦波则设置fword = 85899346
    
*/
    wire    [31:0]      fword           ;
    wire    [3:0]       wave_selcet     ;
    
key_ctrl key_ctrl_inst0
(
    .clk         (clk        ),
    .reset_n     (reset_n    ),
    .key         (key        ),
                             
    .wave_selcet (wave_selcet)
);    

vio_fword vio_fword_inst (
  .clk                  (clk),                // input wire clk
  .probe_out0           (fword)             // output wire [31 : 0] probe_out0
); 

dds_core dds_core_inst0
(
    .clk         (clk        ),
    .reset_n     (reset_n    ),
    .wave_selcet (wave_selcet),
    .fword        (fword      ),

    .data_out    (data_out   )
);

endmodule

（3）引脚绑定：

set_property IOSTANDARD LVCMOS33 [get_ports {key[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports clk]
set_property IOSTANDARD LVCMOS33 [get_ports dac_clk]
set_property IOSTANDARD LVCMOS33 [get_ports {data_out[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {data_out[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {data_out[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {data_out[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {data_out[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {data_out[5]}]
set_property IOSTANDARD LVCMOS33 [get_ports {data_out[6]}]
set_property IOSTANDARD LVCMOS33 [get_ports {data_out[7]}]
set_property IOSTANDARD LVCMOS33 [get_ports {key[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {key[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {key[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports reset_n]
set_property PACKAGE_PIN W19 [get_ports clk]
set_property PACKAGE_PIN U22 [get_ports dac_clk]
set_property PACKAGE_PIN P19 [get_ports {data_out[0]}]
set_property PACKAGE_PIN R19 [get_ports {data_out[1]}]
set_property PACKAGE_PIN N13 [get_ports {data_out[2]}]
set_property PACKAGE_PIN N14 [get_ports {data_out[3]}]
set_property PACKAGE_PIN M18 [get_ports {data_out[4]}]
set_property PACKAGE_PIN L18 [get_ports {data_out[5]}]
set_property PACKAGE_PIN N18 [get_ports {data_out[6]}]
set_property PACKAGE_PIN N19 [get_ports {data_out[7]}]
set_property PACKAGE_PIN V17 [get_ports {key[0]}]
set_property PACKAGE_PIN W17 [get_ports {key[1]}]
set_property PACKAGE_PIN AA18 [get_ports {key[2]}]
set_property PACKAGE_PIN AB18 [get_ports {key[3]}]
set_property PACKAGE_PIN N15 [get_ports reset_n]

（4）实验现象：

板卡连线情况：

（2）VIO界面调试频率：

计算并将频率改成5000Hz

通过按键，切换成方波、三角板、锯齿波

调整频率为20KHz